| Brand Name : ABB |
| Model Number : UAD155A0111 3BHE029110R0111 |
| Place of Origin : China |
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Related Keywords :
UAD155A0111
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3BHE029110R0111
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 Description
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PXAH401 3BSE017235R1 500CPU05 1MRB150081R1/E 500CIM05 1MRB150077R1/B 500BIO01 1MRB150005R1/J PFEA113-20 ...  More ...PXAH401 3BSE017235R1 500CPU05 1MRB150081R1/E 500CIM05 1MRB150077R1/B 500BIO01 1MRB150005R1/J PFEA113-20 3BSE028144R0020 KUC711AE101 3BHB004661R0101 XVC767AE102 3BHB007209R0102 CI854AK01Inc.'s BootWare. BootWare provides remote access to the VMIVME-7750 network protocol using NetWare, TCP/IP, or RPL. BootWare features: ? Support for NetWare, TCP/IP, and RPL network protocols ? Unmatched boot sector virus protection ? Detailed boot configuration screen ? Comprehensive diagnosis ? Optional disabling of local boot ? Dual boot option allows users to choose between network or local boot serial ports - two 16550 compatible serial ports are a feature on the front panel of VMIVME-7750. The serial channel has a 16 byte FIFO that supports up to 1.5 million bauds. Two micro-DB-9 to standard DB-9 adapters are required, VMIC P/N 360-010050-001. The keyboard and mouse port VMIVME-7750 has a PS/2 keyboard and mouse combination connector. Includes a Y-shaped adapter cable. Flash memory - VMIVME-7750 provides access through an auxiliary IDE port. The VMIVME-7750 BIOS includes an option to allow the board to boot from flash memory. TIMERS VMIVME-7750 provides users with two 16 bit timers and two 32-bit timers (in addition to the system timer). These timers are fully software programmable in the I/O space. Watchdog Timer - VMIVME-7750 provides software programmable watchdog timers. The watchdog timer is enabled under software control. The previous watchdog timer has been enabled, and the onboard software must access the timer within the specified timer cycle, or a timeout will occur. a. User jumper allows timeout, resulting in reset. Independent for jumpers, software can enable watchdog timeout causing non sliding interrupts (NMI) or VME bus SYSFAIL. Non volatile SRAM - VMIVME-7750 provides 32K bytes of non volatile SRAM. The content has been removed from the unit when the+5V power supply is interrupted. PMC Expansion Site - VMIVME-7750 supports IEEE P1386 Universal Mezzanine Card Specification with 5V PCI Mezzanine Card Expansion Site. PMC provides standard I/O for VMEbus front panel on site. An optional I/O connection for VMEbus P2 connection is available. For more information about PMC, please contact the VMIC module and compatibility. The Universal Serial Bus (USB) VMIVME-7750 provides a front panel dual hub USB host controller. The supported USB features include synchronous data transfer, asynchronous messaging, self identification and configuration of peripheral devices, 3BSE030220R1 PM865K01 3BSE031151R1 3BHE039724R0C3D PPD513AOC-100440 KUC755AE105 3BHB005243R0105 PPD517A3011 3BHE041576R3011 SYN5202a-Z,V221 3BHB006715R0221 S-073N 3BHB009884R0021 PPC907BE 3BHE024577R0101 PM866K01 3BSE050198R1 UAD149A1501 3BHE014135R1501 UNC4672AV1 HIEE205012R1 S-073N 3BHB009884R0021 PCD530A102 3BHE041343R0102 PM866K01 3BSE050198R1 PFSA103D 3BSE002492R0001 CI871AK01 3BSE092693R1 PCD530A102 3BHE041343R0102 PFEA111-65 3BSE050090R65 UNITROL1020 UNS0119A-Z,V1 3BHE030579R0001PXAH401 3BSE017235R1 500CPU05 1MRB150081R1/E 500CIM05 1MRB150077R1/B 500BIO01 1MRB150005R1/J PFEA113-20 3BSE028144R0020 KUC711AE101 3BHB004661R0101 XVC767AE102 3BHB007209R0102 CI854AK01 3BSE030220R1 PM865K01 3BSE031151R1 3BHE039724R0C3D PPD513AOC-100440 KUC755AE105 3BHB005243R0105 PPD517A3011 3BHE041576R3011 SYN5202a-Z,V221 3BHB006715R0221 S-073N 3BHB009884R0021 PPC907BE 3BHE024577R0101 PM866K01 3BSE050198R1 UAD149A1501 3BHE014135R1501 UNC4672AV1 HIEE205012R1 S-073N 3BHB009884R0021 PCD530A102 3BHE041343R0102 PM866K01 3BSE050198R1 PFSA103D 3BSE002492R0001 CI871AK01 3BSE092693R1 PCD530A102 3BHE041343R0102 PFEA111-65 3BSE050090R65 UNITROL1020 UNS0119A-Z,V1 3BHE030579R0001PXAH401 3BSE017235R1 500CPU05 1MRB150081R1/E 500CIM05 1MRB150077R1/B 500BIO01 1MRB150005R1/J PFEA113-20 3BSE028144R0020 KUC711AE101 3BHB004661R0101 XVC767AE102 3BHB007209R0102 CI854AK01 3BSE030220R1 PM865K01 3BSE031151R1 3BHE039724R0C3D PPD513AOC-100440 KUC755AE105 3BHB005243R0105and dynamic (hot) connections. VME bus interface - VMIVME-7750 VMEbus interface based on Universe IIB high-performance PCI to VME interface New Bridge/Tundra. System Controller - The onboard VMEbus system controller function allows the board to act as slot 1 controller, or when another board acts as the system controller. The system controller can be programmed to provide the following arbitration modes: Round Robin (RRS) Single Layer (SGL) Priority (PRI) The system controller provides SYSCLK drivers, IACK * daisy chain drivers, and VMEbus access timeout timers. The system controller also provides arbitration If BBSY is not seen within the specified time thereafter, a BGOUT signal will be issued when timeout occurs. This cycle can be programmed for 16 or 256 μ s. VMEbus Request - The microprocessor can use any VMEbus to request and gain control request lines (BR3 * to BR0) to the bus. This requester can be programmed in the following mode: Release After Request Release (ROR) (RWD) VMEbus Capture and Hold (BCAP) MAILBOX - The VMEbus interface provides four 32-bit mailboxes that can be expressed between the microprocessor and the processor provided by the VMEbus when accessing the microprocessor. INTERRupT HANDLER - Interrupt handler monitor that can be programmed to respond to any or all VMEbus IRQ * lines. All normal VMEbus related interrupts can be mapped to PCI INTA # or SERR # interrupts. This includes: mailbox interrupt VMEbus interrupt VMEbus interrupt IACK cycle (confirming VMIVME-7750 VME bus sends an interrupt) All error handling VMEbus related interrupts can be mapped to PCI INTA # or SERR #. Note: PCI SERR # starts SBC NMI. This includes: The ACFAIL interrupt BERR interrupt SYSFAIL interrupt handler has corresponding STATUS/ID registers for each IRQ interrupt. Once the handler receives an IRQ, it requests VMEbus, and once approved, it executes the IACK loop at that level. Once the IACK loop is completed, the STATUS/ID is stored in the corresponding ID register, an appropriate interrupt status bit is set in the internal status register, and a PCI interrupt is generated. PCI interrupts can be mapped to PCI INTA # or SERR# INTERRupTER - Interrupts can occur on any or all software control lines (IRQ7 * to IRQ1 *) of the seven VME bus interrupts. Associate a common ID register with all interrupt lines. During the interrupt confirmation cycle, the interrupt program sends the ID to the interrupt handler. The interrupter can programmatically generate PCI. When the VMEbus interrupt handler is used, the INTA # or SERR # interrupt confirms the VMEbus interrupt generated by the software. Byte swapping - Intel 80x86 series processors use the little endian format. Accommodating other VMEbus modules that transmit data in big endian format as part of the 680x0 processor series, VMIVME-7750 includes byte switching hardware. This provides independent byte exchange interfaces for the master and slave devices. The byte exchange between the main interface and the slave interface is both under software control. VMIVME-7750 supports high throughput DMA Master and transfer slave configurations for medium byte, word, and long word transmissions. If endian conversion is not required, we provide a special "bypass" mode that can be used to further improve throughput. (Not applicable for byte transfer.) Main interface -- MA32: MBLet32: MBLT64 (A32: A24: A16: D32: D16: D8 (EO): BLT32) The VMEbus main interface provides nine independent memory windows to VMEbus resources. Each window is used to map PCI transfers to VMEbus (i.e. PCI base address, window size, VMEbus base address, VMEbus access type, VMEbus address/data size, etc.). The maximum/minimum window sizes for the nine windows are as follows: Slave Interface - Memory Access SAD032: SD32: SBLT32: SBLT64 (A32: A24: A16: D32: D16: D8 (EO): BLT32) VMEbus Slave Interface provides eight independent memory windows for converting to PCI resources. Each window has a separate configuration register for mapping VMEbus transmission to the PCI bus (i.e. PPD517A3011 3BHE041576R3011 SYN5202a-Z,V221 3BHB006715R0221 S-073N 3BHB009884R0021 PPC907BE 3BHE024577R0101 PM866K01 3BSE050198R1 UAD149A1501 3BHE014135R1501 UNC4672AV1 HIEE205012R1 S-073N 3BHB009884R0021 PCD530A102 3BHE041343R0102 PM866K01 3BSE050198R1 PFSA103D 3BSE002492R0001 CI871AK01 3BSE092693R1 PCD530A102 3BHE041343R0102 PFEA111-65 3BSE050090R65 UNITROL1020 UNS0119A-Z,V1 3BHE030579R0001PXAH401 3BSE017235R1 500CPU05 1MRB150081R1/E 500CIM05 1MRB150077R1/B 500BIO01 1MRB150005R1/J PFEA113-20 3BSE028144R0020 KUC711AE101 3BHB004661R0101 XVC767AE102 3BHB007209R0102 CI854AK01 3BSE030220R1 PM865K01 3BSE031151R1 3BHE039724R0C3D PPD513AOC-100440 KUC755AE105 3BHB005243R0105 PPD517A3011 3BHE041576R3011 SYN5202a-Z,V221 3BHB006715R0221 S-073N 3BHB009884R0021 PPC907BE 3BHE024577R0101 PM866K01 3BSE050198R1 UAD149A1501 3BHE014135R1501 UNC4672AV1 HIEE205012R1 S-073N 3BHB009884R0021 PCD530A102 3BHE041343R0102 PM866K01 3BSE050198R1 PFSA103D 3BSE002492R0001 CI871AK01 3BSE092693R1 PCD530A102 3BHE041343R0102 PFEA111-65 3BSE050090R65 UNITROL1020 VMEbus base address, window size, PCI base address, VMEbus access type, VMEbus address/data size, etc.). The maximum/minimum window size for eight windows is as follows: Use write to post FIFO and/or read to prefetch FIFO to improve system performance. In coupling mode, bypassing FIFOs, VMEbus transactions are directly coupled to the PCI bus (meaning that transfers on VMEbus are not completed until they are completed on the PCI bus). Enhanced bus error handling - The enhanced feature of Universal chip bus error handling provides features. Provide latches and registers to allow SBC to read causing bus errors in all modes. The Universal chip supports limited decoupling modes. Provides support for bus cycle timeouts and bus error assertions. The board can be configured to assert bus errors regardless of its status as a system controller. This only asserts bus errors when the Universe chip is the system controller. In addition, this board can be configured to assert interrupts during bus cycle timeouts. The operating system and software SUPERT-VMIVME-7750 provide features beyond embedded PC/AT functionality. These features are supported by VMIC software products aimed at developers who are currently merging VMIC SBC, I/O boards, and workstations into the system. Windows NT/Windows 2000 and VxWorks are the most common supported operating systems through VMIC software products. Windows NT/Windows 2000- IOWorks ? A software family is a set of working software components that together or individually provide an environment/Windows 2000 operating system for the comprehensive development of any application in Windows NT. VMISFT-9420 VME bus access ? For Windows NT/Windows 2000- VMEbus access, this product is specifically designed to access the advanced VMIVME-7750 VMEbus access architecture. Running on Windows NT/Windows 2000, VMEbus Access is both complex and easy to use. The function libraryUNS0119A-Z,V1 3BHE030579R0001PXAH401 3BSE017235R1 500CPU05 1MRB150081R1/E 500CIM05 1MRB150077R1/B 500BIO01 1MRB150005R1/J PFEA113-20 3BSE028144R0020 KUC711AE101 3BHB004661R0101 XVC767AE102 3BHB007209R0102 CI854AK01 3BSE030220R1 PM865K01 3BSE031151R1 3BHE039724R0C3D PPD513AOC-100440 KUC755AE105 3BHB005243R0105 PPD517A3011 3BHE041576R3011 SYN5202a-Z,V221 3BHB006715R0221 S-073N 3BHB009884R0021 PPC907BE 3BHE024577R0101 PM866K01 3BSE050198R1 UAD149A1501 3BHE014135R1501 UNC4672AV1 HIEE205012R1 S-073N 3BHB009884R0021 PCD530A102 3BHE041343R0102 PM866K01 3BSE050198R1 PFSA103D 3BSE002492R0001 CI871AK01 3BSE092693R1 PCD530A102 3BHE041343R0102 PFEA111-65 3BSE050090R65 UNITROL1020 UNS0119A-Z,V1 3BHE030579R0001  Less ...
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Results : Embedded Processor Module
